Journal Finder

The Grid is a rapidly developing computing structure that allows components of our information technology infrastructure, computational capabilities, databases, sensors, and people to be shared flexibly as true collaborative tools. Over the last 3 years there has been a real explosion of new theory and technological progress supporting a better understanding of these wide-area, fully distributed computing systems. After the advances made in distributed system design, collaborative environments, high performance computing and high throughput computing, the Grid is the logical next step.The new Aims and Scope of FGCS will cover new developments in:[1] Grid Applications and application support:Novel applicationseScience and eBusiness applicationsProblem solving environments and virtual laboratoriesGrid economySemantic and knowledge based gridsCollaborative Grids and virtual organizationsHigh Performance and high throughput computing on gridsComplex application workflowsScientific, industrial and social implicationsGrids in education[2] Grid methods and middleware:Tools for grid development: monitoring and schedulingDistributed dynamic resource managementGrid- and web-servicesInformation managementProtocols and emerging standardsPeer to peer and internet computingPervasive computingGrid Security[3] Grid Theory:Process specification; program and algorithm designTheoretical aspects of wide area communication and computationScaling and performance theoryProtocol verification

Methods for artificial evolution of active components are rapidly developing branches of adaptive computation and adaptive engineering. They entail the development, evaluation and application of methods that mirror the process of neo-Darwinian evolution. Genetic Programming and Evolvable Machines reports innovative and significant progress in automatic evolution of software and hardware. It features both theoretical and application papers and covers hardware implementations, artificial life, molecular computing and emergent computation techniques. In addition to its main topics, the journal covers related topics such as evolutionary algorithms with variable-size genomes, alternate methods of program induction, approaches to engineering systems development based on embryology, morphogenesis or other techniques inspired by adaptive natural systems.

The growth in the information and communication technology (ICT) sector has exploded over the past 20 years. This technology advancement enables portable devices to be always connected while supporting high data rate, resulting in the recent popularity of smartphones that have a considerable impact in economic and social development. The high processing capability and the ubiquitous connectivity of recent communication devices allow telecommunication technology to be converged with other industry sectors, such as healthcare, automobile, transportation, entertainment, building architecture, and energy. This convergence in ICT opens up great opportunities for new services and applications, which can lead to economic growth with a wide spectrum of industrial areas. ICT Express, published by the Korean Institute of Communications and Information Sciences (KICS), is a quarterly archived open access journal providing researchers in the ICT field an opportunity to share their newest research results in a timely manner. Each submission will be reviewed by experts in the field. Once accepted, the provisional version will be published online within six weeks after the submission, and the final version will be published online within eight weeks. ICT Express covers the field of ICT convergence, platform technologies, communication networks, and device technologies. We invite short-length (up to 4 pages in double columns) high-quality, original letter articles that explicitly address the unique technical challenges encountered in the convergence of information and communication technology.

IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing. Submissions are welcomed on any topic in computer architecture, especially but not limited to: microprocessor and multiprocessor systems, microarchitecture and ILP processors,  workload characterization, performance evaluation and simulation techniques, compiler-hardware and operating system-hardware interactions, interconnect architectures, memory and cache systems, power and thermal issues at the architecture level, I/O architectures and techniques, independent validation of previously published results, analysis of unsuccessful techniques,  domain-specific processor architectures (e.g., embedded, graphics, network, etc.), real-time and high-availability architectures, reconfigurable systems.

LCA is a semi-annual forum for fast publication of new, high-quality ideas in the form of short, critically refereed, technical papers. Submissions are accepted on a continuing basis, and accepted letters will be published immediately in the IEEE Digital Library and in the next available print issue. Members of the Technical Committee on Computer Architecture will receive the print issue as a benefit of being a member. Authors should submit their manuscript through ScholarOne Manuscripts. 

IEEE Design & Test offers original works describing the models, methods, and tools used to design and test microelectronic systems from devices and circuits to complete systems-on-chip and embedded software. The magazine focuses on current and near-future practice, and includes tutorials, how-to articles, and real-world case studies. The magazine seeks to bring to its readers not only important technology advances but also technology leaders, their perspectives through its columns, interviews, and roundtable discussions. Topics include semiconductor IC design, semiconductor intellectual property blocks, design, verification and test technology, design for manufacturing and yield, embedded software and systems, low-power and energy-efficient design, electronic design automation tools, practical technology, and standards.

The IEEE Engineering Management Review, the Society's "journal of practice," publishes papers and articles consisting of original content that serves those who manage technology, engineering and innovation (including non-engineers); engineers who hold strategic leadership responsibilities (even if outside of the practice of engineering); and upward-bound engineers with an interest in management as a profession.

Note: EMR Volumes 16-31 (1988-2001) are not currently included in IEEE Xplore.

Note: This publication may contain reprint articles for which IEEE does not hold copyright. Full-text is not available on IEEE Xplore for these articles.

IEEE Internet of Things (IoT) Journal publishes articles on the latest advances, as well as review articles, on the various aspects of IoT. Topics include IoT system architecture, IoT enabling technologies, IoT communication and networking protocols such as network coding, and IoT services and applications. Examples are IoT demands, impacts, and implications on sensors technologies, big data management, and future Internet design for various IoT use cases, such as smart cities, smart environments, smart homes, etc. The fields of interest include: IoT architecture such as things-centric, data-centric, service-oriented IoT architecture; IoT enabling technologies and systematic integration such as sensor technologies, big sensor data management, and future Internet design for IoT; IoT services, applications, and test-beds such as IoT service middleware, IoT application programming interface (API), IoT application design, and IoT trials/experiments; IoT standardization activities and technology development in different standard development organizations (SDO) such as IEEE, IETF, ITU, 3GPP, ETSI, etc.

IEEE Micro addresses users and designers of microprocessors and microprocessor systems, including managers, engineers, consultants, educators, and students involved with computers and peripherals, components and subassemblies, communications, instrumentation and control equipment, and guidance systems. Contributions should relate to the design, performance, or application of microprocessors and microcomputers. Tutorials, review papers, and discussions are also welcome. Sample topic areas include architecture, communications, data acquisition, control, hardware and software design/implementation, algorithms (including program listings), digital signal processing, microprocessor support hardware, operating systems, computer aided design, languages, application software, and development systems.

IEEE MultiMedia contains technical information covering a broad range of issues in multimedia systems and applications. Articles discuss research as well as advanced practice in hardware/software and are expected to span the range from theory to working systems. Especially encouraged are papers discussing experiences with new or advanced systems and subsystems. To avoid unnecessary overlap with existing publications, acceptable papers must have a significant focus on aspects unique to multimedia systems and applications. These aspects are likely to be related to the special needs of multimedia information compared to other electronic data, for example, the size requirements of digital media and the importance of time in the representation of such media. The following list is not exhaustive, but is representative of the topics that are covered: Hardware and software for media compression, coding & processing; Media representations & standards for storage, editing, interchange, transmission & presentation; Hardware platforms supporting multimedia applications; Operating systems suitable for multimedia applications; Storage devices & technologies for multimedia information; Network technologies, protocols, architectures & delivery techniques intended for multimedia; Synchronization issues; Multimedia databases; Formalisms for multimedia information systems & applications; Programming paradigms & languages for multimedia; Multimedia user interfaces; Media creation integration editing & management; Creation & modification of multimedia applications. The primary goal of the magazine is to provide a forum for researchers and practitioners to present new findings and discuss experiences with multimedia systems and applications. In addition, the magazine keeps readers informed of the state of the art in the multimedia arena, including technical trends and research directions.

As currently defined, IEEE Network covers the following areas: 1. network protocols and architectures, 2. Protocol design and validation, 3. Communication software and its development and test, 4. Network control and signalling, 5. network management, 6. Practical network implementations including local area networks, (LANs), metropolitan area networks (MANs), and wide area networks, (WANs), 7. Switching and processing in integrated (voice/data) networks and network components, 8. Micro-to-host communication.

The IEEE Transactions on Cloud Computing (TCC) is dedicated to the multidisciplinary field of cloud computing. It is committed to the publication of articles that present innovative research ideas, application results, and case studies in cloud computing, focusing on key technical issues related to theory, algorithms, systems, applications, and performance.

The IEEE Transactions on Cognitive Communications and Networking (TCCN) is committed to timely publishing of high-quality manuscripts that advance to the state-of-the-art of cognitive communications and networking research. Cognitive in this context means the applications of perception, learning, reasoning, memory and adaptive approaches in the design of communication systems. The transactions will consider submissions in the broad area of cognitive communications and networks, with an emphasis on taking holistic and possibly trans-disciplinary approach on design of complex communications systems. The core topics covered include (but are not limited to): architecture, protocols, cross-layer, and cognition cycle design for cognitive networks, machine learning and artificial intelligence for cognitive communications and networks, end-to-end and distributed intelligence at and beyond all layers of communications, software-defined networking, cognitive radios, spectrum sharing, trading and relevant economical aspects of networks, security and privacy issues in cognitive networks, novel emerging services and applications enabled by such concepts.

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field. It publishes papers on research in areas of current interest to the readers. These areas include, but are not limited to, the following: a) computer organizations and architectures; b) operating systems, software systems, and communication protocols; c) real-time systems and embedded systems; d) digital devices, computer components, and interconnection networks; e) specification, design, prototyping, and testing methods and tools; f) performance, fault tolerance, reliability, security, and testability; g) case studies and experimental and theoretical evaluations; and h) new and important applications and trends.

Additional Information

IEEE Transactions on Computers publishes papers on research in areas of current interest to the readers, including but not limited to the following: a) computer organizations and architectures (multicores, manycores, accelerators, application-specific, domain-specific and reconfigurable processors, processing-in-memory, near-data processing, and  datacenters); b) operating systems, software systems, and cloud computing  (runtime systems, parallel and distributed systems, virtualization, and software-hardware interactions); c) real-time, mobile and embedded systems (Internet of Things, edge computing, wearables, actuators, and sensor networks); d) digital devices, computer components, and interconnection networks (volatile and non-volatile emerging memory technologies, solid-state devices for storage, emerging technologies for interconnects); e) specification, design, prototyping, and testing methods and tools; f) performance, fault tolerance, reliability, security, and testability (availability, scalability, energy/power management); g) case studies and experimental and theoretical evaluations (workload characterization, tracing, analyzing, and troubleshooting) ; and h) new and important applications and trends (computing issues for emerging technologies and applications, machine learning, approximate computing, quantum computing, neuromorphic computing, and analog computing).

TC is a scholarly, archival journal published monthly. In addition to full papers, brief contributions are also published.

IEEE Transactions on Parallel and Distributed Systems (TPDS) is published monthly. It publishes a range of papers, comments on previously published papers, and survey articles that deal with the parallel and distributed systems research areas of current importance to our readers. Particular areas of interest include, but are not limited to:

1. Parallel and distributed algorithms, focusing on topics such as: models of computation; numerical, combinatorial, and data-intensive parallel algorithms, scalability of algorithms and data structures for parallel and distributed systems, communication and synchronization protocols, network algorithms, scheduling, and load balancing.
2. Applications of parallel and distributed computing, including computational and data-enabled science and engineering, big data applications, parallel crowd sourcing, large-scale social network analysis, management of big data, cloud and grid computing, scientific and biomedical applications, mobile computing, and cyber-physical systems.
3. Parallel and distributed architectures, including architectures for instruction-level and thread-level parallelism; design, analysis, implementation, fault resilience and performance measurements of multiple-processor systems; multicore processors, heterogeneous many-core systems; petascale and exascale systems designs; novel big data architectures; special purpose architectures, including graphics processors, signal processors, network processors, media accelerators, and other special purpose processors and accelerators; impact of technology on architecture; network and interconnect architectures; parallel I/O and storage systems; architecture of the memory hierarchy; power-efficient and green computing architectures; dependable architectures; and performance modeling and evaluation.
4. Parallel and distributed software, including parallel and multicore programming languages and compilers, runtime systems, operating systems, Internet computing and web services, resource management including green computing, middleware for grids, clouds, and data centers, libraries, performance modeling and evaluation, parallel programming paradigms, and programming environments and tools.

IEEE Transactions on Services Computing emphasizes the algorithmic, mathematical, statistical and computational methods that are central in services computing; the emerging field of Service Oriented Architecture, Web Services, Business Process Integration, Solution Performance Management, Services Operations and Management. 

Design and realization of microelectronic systems using VLSI/ULSI technologies requires close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing, and systems applications. Generation of specifications, design, and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor, and process levels.

To address this critical area through a common forum, the IEEE Transactions on VLSI Systems was founded. The editorial board, consisting of international experts, invites original papers which emphasize the novel system integration aspects of microelectronic systems, including interactions among system design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and system level qualification. Thus, the coverage of this Transactions focuses on VLSI/ULSI microelectronic system integration.

Topics of special interest include, but are not strictly limited to, the following: • System Specification, Design and Partitioning, • System-level Test, • Reliable VLSI/ULSI Systems, • High Performance Computing and Communication Systems, • Wafer Scale Integration and Multichip Modules (MCMs), • High-Speed Interconnects in Microelectronic Systems, • VLSI/ULSI Neural Networks and Their Applications, • Adaptive Computing Systems with FPGA components, • Mixed Analog/Digital Systems, • Cost, Performance Tradeoffs of VLSI/ULSI Systems, • Adaptive Computing Using Reconfigurable Components (FPGAs) 

IET Computers & Digital Techniques publishes technical papers on recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). It also publishes papers based on the problems associated with the scaling down of CMOS technology. The key subject areas covered include: • Design: Hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, system-on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation • Verification: Electrical and timing simulation, hardware/software co-simulation, mixed-domain technology modelling and simulation, power analysis and estimation, interconnect modelling and signal integrity analysis • Test: Design-for-testability, embedded core testing, system-on-chip testing, on-line testing, test quality and reliability, microprocessor testing, low-power testing, fault modelling and fault tolerance, automatic test generation and delay testing • Processor and system architectures: General-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues • Configurable computing: Embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and reconfigurable hardware • Case studies: State-of-the-art CAD/EDA tools, applications in industrial designs, and design frameworks